/*
 *  Copyright 2004 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* August 2004*/
#include <vport.h>
#include <vportdis.h>
#include <saa7105.h> 
#include <csl_edma.h>


#define EVMDM642_DIS_PARAMS_PORT_DEFAULT  {                           \
    FALSE,                      /*  enableDualChan;     */            \
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 1 polarity    */ \
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 2 polarity    */ \
    VPORT_POLARITY_ACTIVE_HIGH, /* vport control pin 3 polarity    */ \
    &SAA7105_Fxns,                                                    \
    INV,                                                              \
}    
          

#define _EVMDM642_DIS_PARAMS_SAA7105_VGA_DEFAULT(iFmt){   \
  SAA7105_AFMT_RGB,                      \
  SAA7105_MODE_VGA,                      \
  iFmt,                                  \
  TRUE,                                  \
  FALSE,                                 \
  INV                                    \
}

#define _EVMDM642_DIS_PARAMS_SAA7105_SVGA_DEFAULT(iFmt){   \
  SAA7105_AFMT_RGB,                      \
  SAA7105_MODE_SVGA,                     \
  iFmt,                                  \
  TRUE,                                  \
  FALSE,                                 \
  INV                                    \
}

#define _EVMDM642_DIS_PARAMS_SAA7105_XGA_DEFAULT(iFmt)  {   \
  SAA7105_AFMT_RGB,                      \
  SAA7105_MODE_XGA,                      \
  iFmt,                                  \
  TRUE,                                  \
  FALSE,                                 \
  INV                                    \
}

#define _EVMDM642_DIS_PARAMS_CHAN_VGA_DEFAULT(Mode)      {    \
   Mode,       /* dmode:3   */  \
   VPORT_FLDOP_PROGRESSIVE,    /* fldOp:3   */  \
   VPORT_SCALING_DISABLE,      /* scale:1   */  \
   VPORT_RESMPL_DISABLE,       /* resmpl:1  */  \
   VPORTDIS_DEFVAL_ENABLE,     /* defValEn:1*/  \
   VPORTDIS_BPK_10BIT_NORMAL , /*bpk10Bit:1 */  \
   VPORTDIS_VCTL1_HSYNC,   /* vctl1Config:2 */  \
   VPORTDIS_VCTL2_VSYNC,   /* vctl2Config:2 */  \
   VPORTDIS_VCTL3_CBLNK,   /* vctl3Config:1 */  \
   VPORTDIS_EXC_DISABLE,   /* extCtl:3      */  \
   800,                    /* frmHSize */       \
   525,                    /* frmVSize */       \
   0,                      /* imgHOffsetFld1 */ \
   0,                      /* imgVOffsetFld1 */ \
   640,                    /* imgHSizeFld1   */ \
   480,                    /* imgVSizeFld1   */ \
   0,                      /* imgHOffsetFld2 */ \
   0,                      /* imgVOffsetFld2 */ \
   0,                      /* imgHSizeFld2   */ \
   0,                      /* imgVSizeFld2   */ \
   640,                    /* hBlnkStart      */\
   0,                      /* hBlnkStop       */\
   0,                      /* vBlnkXStartFld1 */\
   1,                      /* vBlnkYStartFld1 */\
   0,                      /* vBlnkXStopFld1  */\
   46,                     /* vBlnkYStopFld1  */\
   0,                      /* vBlnkXStartFld2 */\
   0,                      /* vBlnkYStartFld2 */\
   0,                      /* vBlnkXStopFld2  */\
   0,                      /* vBlnkYStopFld2  */\
   0,                      /* xStartFld1 */     \
   1,                      /* yStartFld1 */     \
   0,                      /* xStartFld2 */     \
   0,                      /* yStartFld2 */     \
   656-3,                  /* hSyncStart */     \
   752-3,                      /* hSyncStop  */ \
   656-3,                  /* vSyncXStartFld1 */\
   11,                     /* vSyncYStartFld1 */\
   656-3,                  /* vSyncXStopFld1  */\
   13,                     /* vSyncYStopFld1  */\
   0,                      /* vSyncXStartFld2 */\
   0,                      /* vSyncYStartFld2 */\
   0,                      /* vSyncXStopFld2  */\
   0,                      /* vSyncYStopFld2  */\
   0x10,                    /* yClipLow       */\
   0xf0,                    /* yClipHigh      */\
   0x10,                    /* cClipLow       */\
   0xf0,                    /* cClipHigh      */\
   0x0,                     /*VPDIS_DefVal    */\
   0x0,                      \
   0x0,                      \
   VPORTDIS_RGBX_DISABLE,  /*rawPk_3_4 disable raw 3/4 packing for RGB output*/ \
   1,                     /* incPix, for raw mode only */                       \
   (640>>3),              /*thrld     */       \
   3,                     /*numFrmBufs*/       \
   128,                     /*alignment */     \
   VPORT_FLDS_MERGED,     /*mergeFlds */       \
   NULL,                  /*segId     */       \
   EDMA_OPT_PRI_HIGH,     /*edmaPri   */       \
   8                      /* irqId    */       \
}                                                           

#define _EVMDM642_DIS_PARAMS_CHAN_SVGA_DEFAULT(Mode)      {    \
   Mode,      /* dmode:3   */  \
   VPORT_FLDOP_PROGRESSIVE,   /* fldOp:3   */  \
   VPORT_SCALING_DISABLE,     /* scale:1   */  \
   VPORT_RESMPL_DISABLE,      /* resmpl:1  */  \
   VPORTDIS_DEFVAL_ENABLE,    /* defValEn:1*/  \
   VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */  \
   VPORTDIS_VCTL1_HSYNC,  /* vctl1Config:2 */  \
   VPORTDIS_VCTL2_VSYNC,  /* vctl2Config:2 */  \
   VPORTDIS_VCTL3_CBLNK,  /* vctl3Config:1 */  \
   VPORTDIS_EXC_DISABLE,  /* extCtl:3      */  \
   1056,                   /* frmHSize */      \
   628,                   /* frmVSize */       \
   0,                     /* imgHOffsetFld1 */ \
   0,                     /* imgVOffsetFld1 */ \
   800,                   /* imgHSizeFld1   */ \
   600,                   /* imgVSizeFld1   */ \
   0,                     /* imgHOffsetFld2 */ \
   0,                     /* imgVOffsetFld2 */ \
   0,                     /* imgHSizeFld2   */ \
   0,                     /* imgVSizeFld2   */ \
   800,                   /* hBlnkStart      */\
   0,                     /* hBlnkStop       */\
   0,                     /* vBlnkXStartFld1 */\
   1,                     /* vBlnkYStartFld1 */\
   0,                     /* vBlnkXStopFld1  */\
   29,                    /* vBlnkYStopFld1  */\
   0,                     /* vBlnkXStartFld2 */\
   0,                     /* vBlnkYStartFld2 */\
   0,                     /* vBlnkXStopFld2  */\
   0,                     /* vBlnkYStopFld2  */\
   0,                     /* xStartFld1 */     \
   1,                     /* yStartFld1 */     \
   0,                     /* xStartFld2 */     \
   0,                     /* yStartFld2 */     \
   840-3,                 /* hSyncStart */     \
   968-3,                     /* hSyncStop  */ \
   840-3,                 /* vSyncXStartFld1 */\
   2,                     /* vSyncYStartFld1 */\
   840-3,                 /* vSyncXStopFld1  */\
   6,                     /* vSyncYStopFld1  */\
   0,                     /* vSyncXStartFld2 */\
   0,                     /* vSyncYStartFld2 */\
   0,                     /* vSyncXStopFld2  */\
   0,                     /* vSyncYStopFld2  */\
   0x10,                   /* yClipLow       */\
   0xf0,                   /* yClipHigh      */\
   0x10,                   /* cClipLow       */\
   0xf0,                   /* cClipHigh      */\
   0x0,                    /*VPDIS_DefVal    */\
   0x0,                                        \
   0x0,                                        \
   VPORTDIS_RGBX_DISABLE,  /*rawPk_3_4 disable raw 3/4 packing for RGB output*/ \
   1,                     /* incPix, for raw mode only */                       \
   (800>>3),              /*thrld     */       \
   3,                     /*numFrmBufs*/       \
   128,                     /*alignment */     \
   VPORT_FLDS_MERGED,     /*mergeFlds */       \
   NULL,                  /*segId     */       \
   EDMA_OPT_PRI_HIGH,     /*edmaPri   */       \
   8                      /* irqId    */       \
}                                                           


#define _EVMDM642_DIS_PARAMS_CHAN_XGA_DEFAULT(Mode)      {    \
   Mode,      /* dmode:3   */  \
   VPORT_FLDOP_PROGRESSIVE,   /* fldOp:3   */  \
   VPORT_SCALING_DISABLE,     /* scale:1   */  \
   VPORT_RESMPL_DISABLE,      /* resmpl:1  */  \
   VPORTDIS_DEFVAL_ENABLE,    /* defValEn:1*/  \
   VPORTDIS_BPK_10BIT_NORMAL, /*bpk10Bit:1 */  \
   VPORTDIS_VCTL1_HSYNC,  /* vctl1Config:2 */  \
   VPORTDIS_VCTL2_VSYNC,  /* vctl2Config:2 */  \
   VPORTDIS_VCTL3_CBLNK,  /* vctl3Config:1 */  \
   VPORTDIS_EXC_DISABLE,  /* extCtl:3      */  \
   1344,                   /* frmHSize */      \
   806,                   /* frmVSize */       \
   0,                     /* imgHOffsetFld1 */ \
   0,                     /* imgVOffsetFld1 */ \
   1024,                  /* imgHSizeFld1   */ \
   768,                   /* imgVSizeFld1   */ \
   0,                     /* imgHOffsetFld2 */ \
   0,                     /* imgVOffsetFld2 */ \
   0,                     /* imgHSizeFld2   */ \
   0,                     /* imgVSizeFld2   */ \
   1024,                  /* hBlnkStart      */\
   0,                     /* hBlnkStop       */\
   0,                     /* vBlnkXStartFld1 */\
   1,                     /* vBlnkYStartFld1 */\
   0,                     /* vBlnkXStopFld1  */\
   39,                    /* vBlnkYStopFld1  */\
   0,                     /* vBlnkXStartFld2 */\
   0,                     /* vBlnkYStartFld2 */\
   0,                     /* vBlnkXStopFld2  */\
   0,                     /* vBlnkYStopFld2  */\
   0,                     /* xStartFld1 */     \
   1,                     /* yStartFld1 */     \
   0,                     /* xStartFld2 */     \
   0,                     /* yStartFld2 */     \
   1048-3,                /* hSyncStart */     \
   1184-3,                    /* hSyncStop  */ \
   1048-3,                /* vSyncXStartFld1 */\
   4,                     /* vSyncYStartFld1 */\
   1048-3,                /* vSyncXStopFld1  */\
   10,                    /* vSyncYStopFld1  */\
   0,                     /* vSyncXStartFld2 */\
   0,                     /* vSyncYStartFld2 */\
   0,                     /* vSyncXStopFld2  */\
   0,                     /* vSyncYStopFld2  */\
   0x10,                   /* yClipLow       */\
   0xf0,                   /* yClipHigh      */\
   0x10,                   /* cClipLow       */\
   0xf0,                   /* cClipHigh      */\
   0x0,                    /*VPDIS_DefVal    */\
   0x0,                                  \
   0x0,                                  \
   VPORTDIS_RGBX_DISABLE,  /*rawPk_3_4 disable raw 3/4 packing for RGB output*/ \
   1,                     /* incPix, for raw mode only */                       \
   (1024>>3),             /*thrld     */       \
   3,                     /*numFrmBufs*/       \
   128,                     /*alignment */     \
   VPORT_FLDS_MERGED,     /*mergeFlds */       \
   NULL,                  /*segId     */       \
   EDMA_OPT_PRI_HIGH,     /*edmaPri   */       \
   8                      /* irqId    */       \
}                                                           
                         

#define EVMDM642_DIS_PARAMS_SAA7105_RGB565_DEFAULT(Mode)  \
    _EVMDM642_DIS_PARAMS_SAA7105_##Mode##_DEFAULT(SAA7105_IFMT_RGB565)
#define EVMDM642_DIS_PARAMS_CHAN_RGB565_DEFAULT(Mode) \
    _EVMDM642_DIS_PARAMS_CHAN_##Mode##_DEFAULT(VPORT_MODE_RAW_16BIT)

#define EVMDM642_DIS_PARAMS_CHAN_GRAYSCALE_DEFAULT(Mode) \
    _EVMDM642_DIS_PARAMS_CHAN_##Mode##_DEFAULT(VPORT_MODE_RAW_8BIT)

#define EVMDM642_DIS_PARAMS_SAA7105_GRAYSCALE_DEFAULT(Mode)  \
    _EVMDM642_DIS_PARAMS_SAA7105_##Mode##_DEFAULT(SAA7105_IFMT_COLOR_INDEX)
